33
AT/TSC8x251G2D
4135F–8051–11/06
Notes:
1. Instructions that move bits are in Table 27.
2. Move instructions unique to the C251 Architecture.
3. If this instruction addresses an I/O Port (Px, x = 0-3), add 1 to the number of states. Add 2 if it addresses a Peripheral SFR.
4. If this instruction addresses external memory location, add N+2 to the number of states (N: number of wait states).
5. If this instruction addresses external memory location, add 2(N+1) to the number of states (N: number of wait states).
6. If this instruction addresses external memory location, add 4(N+2) to the number of states (N: number of wait states).
MOV
WRj, at WRj
+dis24
Indirect with 16-bit displacement (16M) to word register
5
8(5)
47(5)
MOV
at WRj +dis16,
Rm
Byte register to indirect with 16-bit displacement (64K)
5
6(4)
45(4)
MOV
at WRj +dis16,
WRj
Word register to indirect with 16-bit displacement (64K)
5
7(5)
46(5)
MOV
at DRk +dis24,
Rm
Byte register to indirect with 16-bit displacement (16M)
5
7(4)
46(4)
MOV
at DRk +dis24,
WRj
Word register to indirect with 16-bit displacement (16M)
5
8(5)
47(5)
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